10 #include "pins_arduino.h" 24 #ifndef ONEWIRE_SEARCH 25 #define ONEWIRE_SEARCH 1 38 #ifndef ONEWIRE_CRC8_TABLE 39 #define ONEWIRE_CRC8_TABLE 1 45 #define ONEWIRE_CRC16 1 58 #define PIN_TO_BASEREG(pin) (portInputRegister(digitalPinToPort(pin))) 59 #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin)) 60 #define IO_REG_TYPE uint8_t 61 #define IO_REG_ASM asm("r30") 62 #define DIRECT_READ(base, mask) (((*(base)) & (mask)) ? 1 : 0) 63 #define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) &= ~(mask)) 64 #define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+1)) |= (mask)) 65 #define DIRECT_WRITE_LOW(base, mask) ((*((base)+2)) &= ~(mask)) 66 #define DIRECT_WRITE_HIGH(base, mask) ((*((base)+2)) |= (mask)) 68 #elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__) 69 #define PIN_TO_BASEREG(pin) (portOutputRegister(pin)) 70 #define PIN_TO_BITMASK(pin) (1) 71 #define IO_REG_TYPE uint8_t 73 #define DIRECT_READ(base, mask) (*((base)+512)) 74 #define DIRECT_MODE_INPUT(base, mask) (*((base)+640) = 0) 75 #define DIRECT_MODE_OUTPUT(base, mask) (*((base)+640) = 1) 76 #define DIRECT_WRITE_LOW(base, mask) (*((base)+256) = 1) 77 #define DIRECT_WRITE_HIGH(base, mask) (*((base)+128) = 1) 79 #elif defined(__MKL26Z64__) 80 #define PIN_TO_BASEREG(pin) (portOutputRegister(pin)) 81 #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin)) 82 #define IO_REG_TYPE uint8_t 84 #define DIRECT_READ(base, mask) ((*((base)+16) & (mask)) ? 1 : 0) 85 #define DIRECT_MODE_INPUT(base, mask) (*((base)+20) &= ~(mask)) 86 #define DIRECT_MODE_OUTPUT(base, mask) (*((base)+20) |= (mask)) 87 #define DIRECT_WRITE_LOW(base, mask) (*((base)+8) = (mask)) 88 #define DIRECT_WRITE_HIGH(base, mask) (*((base)+4) = (mask)) 90 #elif defined(__SAM3X8E__) 95 #define PIN_TO_BASEREG(pin) (&(digitalPinToPort(pin)->PIO_PER)) 96 #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin)) 97 #define IO_REG_TYPE uint32_t 99 #define DIRECT_READ(base, mask) (((*((base)+15)) & (mask)) ? 1 : 0) 100 #define DIRECT_MODE_INPUT(base, mask) ((*((base)+5)) = (mask)) 101 #define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+4)) = (mask)) 102 #define DIRECT_WRITE_LOW(base, mask) ((*((base)+13)) = (mask)) 103 #define DIRECT_WRITE_HIGH(base, mask) ((*((base)+12)) = (mask)) 107 #ifndef pgm_read_byte 108 #define pgm_read_byte(addr) (*(const uint8_t *)(addr)) 111 #elif defined(__PIC32MX__) 112 #define PIN_TO_BASEREG(pin) (portModeRegister(digitalPinToPort(pin))) 113 #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin)) 114 #define IO_REG_TYPE uint32_t 116 #define DIRECT_READ(base, mask) (((*(base+4)) & (mask)) ? 1 : 0) //PORTX + 0x10 117 #define DIRECT_MODE_INPUT(base, mask) ((*(base+2)) = (mask)) //TRISXSET + 0x08 118 #define DIRECT_MODE_OUTPUT(base, mask) ((*(base+1)) = (mask)) //TRISXCLR + 0x04 119 #define DIRECT_WRITE_LOW(base, mask) ((*(base+8+1)) = (mask)) //LATXCLR + 0x24 120 #define DIRECT_WRITE_HIGH(base, mask) ((*(base+8+2)) = (mask)) //LATXSET + 0x28 122 #elif defined(ARDUINO_ARCH_ESP8266) 123 #define PIN_TO_BASEREG(pin) ((volatile uint32_t*) GPO) 124 #define PIN_TO_BITMASK(pin) (1 << pin) 125 #define IO_REG_TYPE uint32_t 127 #define DIRECT_READ(base, mask) ((GPI & (mask)) ? 1 : 0) //GPIO_IN_ADDRESS 128 #define DIRECT_MODE_INPUT(base, mask) (GPE &= ~(mask)) //GPIO_ENABLE_W1TC_ADDRESS 129 #define DIRECT_MODE_OUTPUT(base, mask) (GPE |= (mask)) //GPIO_ENABLE_W1TS_ADDRESS 130 #define DIRECT_WRITE_LOW(base, mask) (GPOC = (mask)) //GPIO_OUT_W1TC_ADDRESS 131 #define DIRECT_WRITE_HIGH(base, mask) (GPOS = (mask)) //GPIO_OUT_W1TS_ADDRESS 133 #elif defined(__SAMD21G18A__) 134 #define PIN_TO_BASEREG(pin) portModeRegister(digitalPinToPort(pin)) 135 #define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin)) 136 #define IO_REG_TYPE uint32_t 138 #define DIRECT_READ(base, mask) (((*((base)+8)) & (mask)) ? 1 : 0) 139 #define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) = (mask)) 140 #define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+2)) = (mask)) 141 #define DIRECT_WRITE_LOW(base, mask) ((*((base)+5)) = (mask)) 142 #define DIRECT_WRITE_HIGH(base, mask) ((*((base)+6)) = (mask)) 144 #elif defined(RBL_NRF51822) 145 #define PIN_TO_BASEREG(pin) (0) 146 #define PIN_TO_BITMASK(pin) (pin) 147 #define IO_REG_TYPE uint32_t 149 #define DIRECT_READ(base, pin) nrf_gpio_pin_read(pin) 150 #define DIRECT_WRITE_LOW(base, pin) nrf_gpio_pin_clear(pin) 151 #define DIRECT_WRITE_HIGH(base, pin) nrf_gpio_pin_set(pin) 152 #define DIRECT_MODE_INPUT(base, pin) nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL) 153 #define DIRECT_MODE_OUTPUT(base, pin) nrf_gpio_cfg_output(pin) 155 #elif defined(__arc__) 157 #include "scss_registers.h" 158 #include "portable.h" 159 #include "avr/pgmspace.h" 161 #define GPIO_ID(pin) (g_APinDescription[pin].ulGPIOId) 162 #define GPIO_TYPE(pin) (g_APinDescription[pin].ulGPIOType) 163 #define GPIO_BASE(pin) (g_APinDescription[pin].ulGPIOBase) 164 #define DIR_OFFSET_SS 0x01 165 #define DIR_OFFSET_SOC 0x04 166 #define EXT_PORT_OFFSET_SS 0x0A 167 #define EXT_PORT_OFFSET_SOC 0x50 170 #define PIN_TO_BASEREG(pin) ((volatile uint32_t *)g_APinDescription[pin].ulGPIOBase) 171 #define PIN_TO_BITMASK(pin) pin 172 #define IO_REG_TYPE uint32_t 175 static inline __attribute__((always_inline))
176 IO_REG_TYPE directRead(
volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
179 if (SS_GPIO == GPIO_TYPE(pin)) {
180 ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS));
182 ret = MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, EXT_PORT_OFFSET_SOC);
184 return ((ret >> GPIO_ID(pin)) & 0x01);
187 static inline __attribute__((always_inline))
188 void directModeInput(
volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
190 if (SS_GPIO == GPIO_TYPE(pin)) {
191 WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)),
192 ((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
194 MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin));
198 static inline __attribute__((always_inline))
199 void directModeOutput(
volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
201 if (SS_GPIO == GPIO_TYPE(pin)) {
202 WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)),
203 ((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
205 MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin));
209 static inline __attribute__((always_inline))
210 void directWriteLow(
volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
212 if (SS_GPIO == GPIO_TYPE(pin)) {
213 WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base);
215 MMIO_REG_VAL(base) &= ~(0x01 << GPIO_ID(pin));
219 static inline __attribute__((always_inline))
220 void directWriteHigh(
volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
222 if (SS_GPIO == GPIO_TYPE(pin)) {
223 WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base);
225 MMIO_REG_VAL(base) |= (0x01 << GPIO_ID(pin));
229 #define DIRECT_READ(base, pin) directRead(base, pin) 230 #define DIRECT_MODE_INPUT(base, pin) directModeInput(base, pin) 231 #define DIRECT_MODE_OUTPUT(base, pin) directModeOutput(base, pin) 232 #define DIRECT_WRITE_LOW(base, pin) directWriteLow(base, pin) 233 #define DIRECT_WRITE_HIGH(base, pin) directWriteHigh(base, pin) 236 #define PIN_TO_BASEREG(pin) (0) 237 #define PIN_TO_BITMASK(pin) (pin) 238 #define IO_REG_TYPE unsigned int 240 #define DIRECT_READ(base, pin) digitalRead(pin) 241 #define DIRECT_WRITE_LOW(base, pin) digitalWrite(pin, LOW) 242 #define DIRECT_WRITE_HIGH(base, pin) digitalWrite(pin, HIGH) 243 #define DIRECT_MODE_INPUT(base, pin) pinMode(pin,INPUT) 244 #define DIRECT_MODE_OUTPUT(base, pin) pinMode(pin,OUTPUT) 245 #warning "OneWire. Fallback mode. Using API calls for pinMode,digitalRead and digitalWrite. Operation of this library is not guaranteed on this architecture." 254 volatile IO_REG_TYPE *baseReg;
258 unsigned char ROM_NO[8];
259 uint8_t LastDiscrepancy;
260 uint8_t LastFamilyDiscrepancy;
261 uint8_t LastDeviceFlag;
273 void select(
const uint8_t rom[8]);
282 void write(uint8_t v, uint8_t power = 0);
284 void write_bytes(
const uint8_t *buf, uint16_t count,
bool power = 0);
289 void read_bytes(uint8_t *buf, uint16_t count);
293 void write_bit(uint8_t v);
296 uint8_t read_bit(
void);
311 void target_search(uint8_t family_code);
319 uint8_t search(uint8_t *newAddr,
bool search_mode =
true);
325 static uint8_t crc8(
const uint8_t *addr, uint8_t len);
348 static bool check_crc16(
const uint8_t* input, uint16_t len,
const uint8_t* inverted_crc, uint16_t crc = 0);
362 static uint16_t crc16(
const uint8_t* input, uint16_t len, uint16_t crc = 0);