BayEOSArduino Library
defines.h
1 /* Arduino SPIMemory Library v.3.4.0
2  * Copyright (C) 2019 by Prajwal Bhattaram
3  * Created by Prajwal Bhattaram - 19/05/2015
4  * Modified by Prajwal Bhattaram - 03/06/2019
5  *
6  * This file is part of the Arduino SPIMemory Library. This library is for
7  * Flash and FRAM memory modules. In its current form it enables reading,
8  * writing and erasing data from and to various locations;
9  * suspending and resuming programming/erase and powering down for low power operation.
10  *
11  * This Library is free software: you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation, either version 3 of the License, or
14  * (at your option) any later version.
15  *
16  * This Library is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License v3.0
22  * along with the Arduino SPIMemory Library. If not, see
23  * <http://www.gnu.org/licenses/>.
24  */
25 
26  // Defines and variables specific to SAM architecture
27  #if defined (ARDUINO_ARCH_SAM)
28  #define CHIP_SELECT digitalWrite(csPin, LOW);
29  #define CHIP_DESELECT digitalWrite(csPin, HIGH);
30  #define xfer due.SPITransfer
31  #define BEGIN_SPI due.SPIBegin();
32  extern char _end;
33  extern "C" char *sbrk(int i);
34  //char *ramstart=(char *)0x20070000;
35  //char *ramend=(char *)0x20088000;
36 
37  // Specific access configuration for Chip select pin. Includes specific to RTL8195A to access GPIO HAL - @boseji <salearj@hotmail.com> 02.03.17
38  #elif defined (BOARD_RTL8195A)
39  #define CHIP_SELECT gpio_write(&csPin, 0);
40  #define CHIP_DESELECT gpio_write(&csPin, 1);
41  #define xfer(n) SPI.transfer(n)
42  #define BEGIN_SPI SPI.begin();
43 
44  // Defines and variables specific to SAMD architecture
45  #elif defined (ARDUINO_ARCH_SAMD) || defined(ARCH_STM32)|| defined(ARDUINO_ARCH_ESP32)
46  #define CHIP_SELECT digitalWrite(csPin, LOW);
47  #define CHIP_DESELECT digitalWrite(csPin, HIGH);
48  #define xfer(n) _spi->transfer(n)
49  #define BEGIN_SPI _spi->begin();
50 
51  // Defines and variables not specific to any architecture
52  #else
53  #define CHIP_SELECT digitalWrite(csPin, LOW);
54  #define CHIP_DESELECT digitalWrite(csPin, HIGH);
55  #define xfer(n) SPI.transfer(n)
56  #define BEGIN_SPI SPI.begin();
57  #endif
58 
59  #ifdef RUNDIAGNOSTIC
60  #if defined(ARDUINO_SAMD_ZERO) && defined(SERIAL_PORT_USBVIRTUAL)
61  #define Serial SERIAL_PORT_USBVIRTUAL
62  #endif
63  #endif
64 
65 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
66 // Common Instructions //
67 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
68 
69 #define MANID 0x90
70 #define PAGEPROG 0x02
71 #define READDATA 0x03
72 #define FASTREAD 0x0B
73 #define WRITEDISABLE 0x04
74 #define READSTAT1 0x05
75 #define READSTAT2 0x35
76 #define READSTAT3 0x15
77 #define WRITESTATEN 0x50
78 #define WRITESTAT1 0x01
79 #define WRITESTAT2 0x31
80 #define WRITESTAT3 0x11
81 #define WRITEENABLE 0x06
82 #define ADDR4BYTE_EN 0xB7
83 #define ADDR4BYTE_DIS 0xE9
84 #define SECTORERASE 0x20
85 #define BLOCK32ERASE 0x52
86 #define BLOCK64ERASE 0xD8
87 #define CHIPERASE 0x60
88 #define ALT_CHIPERASE 0xC7 // Some flash chips use a different chip erase command
89 #define SUSPEND 0x75
90 #define ID 0x90
91 #define RESUME 0x7A
92 #define JEDECID 0x9F
93 #define POWERDOWN 0xB9
94 #define RELEASE 0xAB
95 #define READSFDP 0x5A
96 #define UNIQUEID 0x4B
97 #define FRAMSERNO 0xC3
98 
99 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
100 // General size definitions //
101 // B = Bytes; KiB = Kilo Bytes; MiB = Mega Bytes //
102 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
103 #define B(x) uint32_t(x*BYTE)
104 #define KB(x) uint32_t(x*KiB)
105 #define MB(x) uint32_t(x*MiB)
106 
107 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
108 // SFDP related defines //
109 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
110 #define DWORD(x) x
111 #define FIRSTBYTE 0x01
112 #define SFDPSIGNATURE 0x50444653
113 #define ADDRESSOFSFDPDWORD(x,y) x+((y - 1) * 4)
114 #define ADDRESSOFSFDPBYTE(x,y,z) x+((y - 1) * 4)+(z - 1)
115 #define KB4ERASE_TYPE 0x0C
116 #define KB32ERASE_TYPE 0x0F
117 #define KB64ERASE_TYPE 0x10
118 #define KB256ERASE_TYPE 0x12
119 #define MS1 0b00000000
120 #define MS16 0b00000001
121 #define MS128 0b00000010
122 #define S1 0b00000011
123 
124 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
125 // Fixed SFDP addresses //
126 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
127 #define SFDP_HEADER_ADDR 0x00
128 #define SFDP_SIGNATURE_DWORD 0x01
129 #define SFDP_NPH_DWORD 0x02
130 #define SFDP_NPH_BYTE 0x03
131 #define SFDP_PARAM_TABLE_LENGTH_DWORD 0x01
132 #define SFDP_PARAM_TABLE_LENGTH_BYTE 0x04
133 #define SFDP_BASIC_PARAM_TABLE_HDR_ADDR 0x08
134 #define SFDP_BASIC_PARAM_TABLE_NO 0x01
135 #define SFDP_MEMORY_DENSITY_DWORD 0x02
136 #define SFDP_SECTOR_MAP_PARAM_TABLE_NO 0x02
137 #define SFDP_ERASE1_BYTE 0x01
138 #define SFDP_ERASE1_INSTRUCTION_DWORD 0x08
139 #define SFDP_ERASE2_INSTRUCTION_DWORD 0x09
140 #define SFDP_SECTOR_ERASE_TIME_DWORD 0x0A
141 #define SFDP_CHIP_ERASE_TIME_DWORD 0x0B
142 #define SFDP_PROGRAM_TIME_DWORD 0x0B
143 
144 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
145 // Chip specific instructions //
146 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
147 
148 //~~~~~~~~~~~~~~~~~~~~~~~~~ Winbond ~~~~~~~~~~~~~~~~~~~~~~~~~//
149  #define WINBOND_MANID 0xEF
150  #define SPI_PAGESIZE 0x100
151  #define WINBOND_WRITE_DELAY 0x02
152  #define WINBOND_WREN_TIMEOUT 10L
153 
154 //~~~~~~~~~~~~~~~~~~~~~~~~ Microchip ~~~~~~~~~~~~~~~~~~~~~~~~//
155  #define MICROCHIP_MANID 0xBF
156  #define SST25 0x25
157  #define SST26 0x26
158  #define ULBPR 0x98 //Global Block Protection Unlock (Ref sections 4.1.1 & 5.37 of datasheet)
159 
160 //~~~~~~~~~~~~~~~~~~~~~~~~ Cypress ~~~~~~~~~~~~~~~~~~~~~~~~//
161  #define CYPRESS_MANID 0x01
162  #define RAMTRON_FRAM_MANID 0xC2
163 
164 //~~~~~~~~~~~~~~~~~~~~~~~~ Adesto ~~~~~~~~~~~~~~~~~~~~~~~~//
165  #define ADESTO_MANID 0x1F
166 
167 //~~~~~~~~~~~~~~~~~~~~~~~~ Micron ~~~~~~~~~~~~~~~~~~~~~~~~//
168  #define MICRON_MANID 0x20
169  #define M25P40 0x20
170 
171 //~~~~~~~~~~~~~~~~~~~~~~~~ ON ~~~~~~~~~~~~~~~~~~~~~~~~//
172  #define ON_MANID 0x62
173 
174 //~~~~~~~~~~~~~~~~~~~~~~~~ Giga ~~~~~~~~~~~~~~~~~~~~~~~~//
175  #define GIGA_MANID 0xC8
176 
177 //~~~~~~~~~~~~~~~~~~~~~~~~ AMIC ~~~~~~~~~~~~~~~~~~~~~~~~//
178  #define AMIC_MANID 0x37
179  #define A25L512 0x30
180 //~~~~~~~~~~~~~~~~~~~~~~~~ AMIC ~~~~~~~~~~~~~~~~~~~~~~~~//
181  #define MACRONIX_MANID 0xC2
182  #define MX25L4005 0x13
183  #define MX25L8005 0x14
184 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
185 // Definitions //
186 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
187 
188 #define BUSY 0x01
189 #define STDSPI 0x0A
190 #define ALTSPI 0x0B
191 #if defined (ARDUINO_ARCH_ESP32)
192 #define SPI_CLK 20000000 //Hz equivalent of 20MHz
193 #else
194 #define SPI_CLK 104000000 //Hz equivalent of 104MHz
195 #endif
196 #define ENFASTREAD 0x01
197 #define WRTEN 0x02
198 #define SUS 0x80
199 #define WSE 0x04
200 #define WSP 0x08
201 #define ADS 0x01 // Current Address mode in Status register 3
202 #define DUMMYBYTE 0xEE
203 #define NULLBYTE 0x00
204 #define NULLINT 0x0000
205 #define NO_CONTINUE 0x00
206 #define NOVERBOSE 0x00
207 #define VERBOSE 0x01
208 #define PASS 0x01
209 #define FAIL 0x00
210 #define NOOVERFLOW false
211 #define NOERRCHK false
212 #define PRINTOVERRIDE true
213 #define ERASEFUNC 0xEF
214 #define BUSY_TIMEOUT 1000000000L
215 #define arrayLen(x) (sizeof(x) / sizeof(*x))
216 #define lengthOf(x) (sizeof(x))/sizeof(byte)
217 #define BYTE 1L
218 #define KiB 1024L
219 #define MiB KiB * KiB
220 #define S 1000L
221 #define TIME_TO_PROGRAM(x) (_byteFirstPrgmTime + (_byteAddnlPrgmTime * (x - 1)) )
222 
223 #if defined (ARDUINO_ARCH_ESP8266)
224 #define CS 15
225 #elif defined (ARDUINO_ARCH_SAMD)
226 #define CS 10
227 /*********************************************************************************************
228 // Declaration of the Default Chip select pin name for RTL8195A
229 // Note: This has been shifted due to a bug identified in the HAL layer SPI driver
230 // @ref http://www.amebaiot.com/en/questions/forum/facing-issues-with-spi-interface-to-w25q32/
231 // Note: Please use any pin other than GPIOC_0 which is the D10 marked in the kit
232 // Original edit by @boseji <salearj@hotmail.com> 02.03.17
233 // Modified by Prajwal Bhattaram <marzogh@icloud.com> 14.4.17
234 **********************************************************************************************/
235 #elif defined (BOARD_RTL8195A)
236 #define CS PC_4
237 #else
238 #define CS SS
239 #endif
240 
241 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
242 // Arduino Due DMA definitions //
243 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
244 // Use SAM3X DMAC if nonzero
245 #define USE_SAM3X_DMAC 1
246 // Use extra Bus Matrix arbitration fix if nonzero
247 #define USE_SAM3X_BUS_MATRIX_FIX 0
248 // Time in ms for DMA receive timeout
249 #define SAM3X_DMA_TIMEOUT 100
250 // chip select register number
251 #define SPI_CHIP_SEL 3
252 // DMAC receive channel
253 #define SPI_DMAC_RX_CH 1
254 // DMAC transmit channel
255 #define SPI_DMAC_TX_CH 0
256 // DMAC Channel HW Interface Number for SPI TX.
257 #define SPI_TX_IDX 1
258 // DMAC Channel HW Interface Number for SPI RX.
259 #define SPI_RX_IDX 2
260 // Set DUE SPI clock div (any integer from 2 - 255)
261 #define DUE_SPI_CLK 2
262 
263  //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
264  // List of Supported data types //
265  //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
266 
267  #define _BYTE_ 0x01
268  #define _CHAR_ 0x02
269  #define _WORD_ 0x03
270  #define _SHORT_ 0x04
271  #define _ULONG_ 0x05
272  #define _LONG_ 0x06
273  #define _FLOAT_ 0x07
274  #define _STRING_ 0x08
275  #define _BYTEARRAY_ 0x09
276  #define _CHARARRAY_ 0x0A
277  #define _STRUCT_ 0x0B
278 
279 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
280 // Bit shift macros //
281 // Thanks to @VitorBoss //
282 // https://github.com/Marzogh/SPIMemory/issues/76 //
283 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
284 #define Lo(param) ((char *)&param)[0] //0x000y
285 #define Hi(param) ((char *)&param)[1] //0x00y0
286 #define Higher(param) ((char *)&param)[2] //0x0y00
287 #define Highest(param) ((char *)&param)[3] //0xy000
288 #define Low(param) ((int *)&param)[0] //0x00yy
289 #define Top(param) ((int *)&param)[1] //0xyy00
290 
291 // Set bit and clear bit
292 // x -> byte, y -> bit
293 #define setBit(x, y) x |= (1 << y)
294 #define clearBit(x, y) x &= ~(1 << y)
295 #define toggleBit(x, y) x ^= (1 << y)
296 
297 // Query to see if bit is set or cleared.
298 // x -> byte, y -> bit
299 #define bitIsSet(x, y) x & (1 << y)
300 #define bitIsClear(x, y) !(x & (1 << y))
301 
302 //Set nibbles
303 // x -> byte, y -> value to set
304 #define setLowerNibble(x, y) x &= 0xF0; x |= (y & 0x0F) // Clear out the lower nibble // OR in the desired mask
305 #define setUpperNibble(x, y) x &= 0x0F; x |= (y & 0xF0) // Clear out the lower nibble // OR in the desired mask
306 //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
307 
308 #ifndef LED_BUILTIN //fix for boards without that definition
309  #define LED_BUILTIN 13
310 #endif